/*******************************************************************************

NAME            fpgaEppDiag.h
SUMMARY         header file for Zebulon fpga EPP function diagnostics
VERSION         %version: 1 %
UPDATE DATE     %date_modified: Apr 28 14:45 2009 %
PROGRAMMER      %created_by:    Jim Tu %

        Copyright 2009 Quanta Corporation. All Rights Reserved.

DESCRIPTION:
        This file has code to test EPP function of Zebulon fpga

NOTES:

REFERENCE:

*******************************************************************************/

#ifndef __fpga_EPP_DIAG_H__
#define __fpga_EPP_DIAG_H__

/***  EPP operations  ***/
//EPP Status Port Register  - fpga offset 0x010000C1
//EPP Control Port Register - fpga offset 0x010000C2
//EPP Data Port Register    - fpga offset 0x010000C3
//EPP Address Port Register - fpga offset 0x010000C4

#define M_EPP_IS_DONE()			((*(UINT8*)EPP_STATUS_PORT) & 0x40 )
#define M_EPP_IS_WAITING()		((*(UINT8*)EPP_STATUS_PORT) & 0x80 )
#define M_EPP_READ_STATUS()		(*(UINT8*)EPP_STATUS_PORT)
#define M_EPP_WRITE_STATUS(x)	(*(UINT8*)(EPP_STATUS_PORT) = x )
#define M_EPP_WRITE_CONTROL(x)	(*(UINT8*)(EPP_CONTROL_PORT) = x )

#define AHB_ADDRESS_0      		0x00
#define AHB_ADDRESS_1       	0x01
#define AHB_ADDRESS_2       	0x02
#define AHB_ADDRESS_3       	0x03
#define AHB_STATUS          	0x04
#define AHB_H2PDB           	0x05
#define AHB_P2HDB           	0x06
#define AHB_DATA            	0x07
#define AHB_CRC_SEED        	0x08
#define AHB_CRC_CHECK_UINT8  	0x09
#define AHB_CRC_DATA_OUT    	0x0A
#define AHB_CONTROL         	0x0B
#define AHB_CONTROL_2			0x0C
#define AHB_STATUS_1			0x0D

#define SAS2X36_RAM_TEST_OFFSET	0x00000000

#define FPGA_EPP_TEST_PATTERN_0	0xFFFFFFFF
#define FPGA_EPP_TEST_PATTERN_1	0x00000000
#define FPGA_EPP_TEST_PATTERN_2	0xAAAAAAAA
#define FPGA_EPP_TEST_PATTERN_3	0x55555555

/***  Export Function  ***/
VOID    fpgaEppWriteByte(UINT32 addr, UINT8 data);
VOID    fpgaEppWriteDword(UINT32 addr, UINT32 data);
UINT8   fpgaEppReadByte(UINT32 addr);
UINT32  fpgaEppReadDword(UINT32 addr);
VOID    fpgaEppInit(VOID);

INT32   fpgaEppDiag(VOID);
#endif  //__fpga_EPP_DIAG_H__