/******************************************************************************* NAME fpgaMidplaneI2cLib.h SUMMARY header file for Quanta test midplane I2C function library VERSION %version: 1 % UPDATE DATE %date_modified: Apr 30 16:00 2009 % PROGRAMMER %created_by: Jim Tu % Copyright 2009 Quanta Corporation. All Rights Reserved. DESCRIPTION: This file includes all Quanta test midplane I2C functions NOTES: REFERENCE: *******************************************************************************/ #ifndef __FPGA_I2C_GPIO_H__ #define __FPGA_I2C_GPIO_H__ #define I2C_GPIO_IOP_CHANNEL 1 #define I2C_GPIO_9545_ADDRESS 0xE0 #define I2C_MUX_9548_ADDRESS 0xE2 #define I2C_HIC_MUX_9548_ADDRESS 0xE0 #define I2C_GPIO_9545_CHANNEL_0 0x01 #define I2C_GPIO_9545_CHANNEL_1 0x02 #define I2C_GPIO_9545_CHANNEL_2 0x04 #define I2C_GPIO_9545_CHANNEL_3 0x08 #define I2C_HIC_VPD_CHANNEL 0x10 // 9555 number address #define I2C_GPIO_9555_1 (0x40 >> 1) #define I2C_GPIO_9555_2 (0x42 >> 1) #define I2C_GPIO_9555_3 (0x44 >> 1) #define I2C_GPIO_9555_4 (0x40 >> 1) #define I2C_GPIO_9555_5 (0x42 >> 1) #define I2C_GPIO_9555_6 (0x40 >> 1) #define I2C_GPIO_9555_7 (0x42 >> 1) #define I2C_GPIO_9555_8 (0x44 >> 1) #define I2C_GPIO_9555_1_8 0x40 #define I2C_GPIO_9555_2_8 0x42 #define I2C_GPIO_9555_3_8 0x44 #define I2C_GPIO_9555_4_8 0x40 #define I2C_GPIO_9555_5_8 0x42 #define I2C_GPIO_9555_6_8 0x40 #define I2C_GPIO_9555_7_8 0x42 #define I2C_GPIO_9555_8_8 0x44 #define I2C_9555_INPUT_PORT_0 0 #define I2C_9555_INPUT_PORT_1 1 #define I2C_9555_OUTPUT_PORT_0 2 #define I2C_9555_OUTPUT_PORT_1 3 #define I2C_9555_CONF_PORT_0 6 #define I2C_9555_CONF_PORT_1 7 #define I2C_9555_P0_BIT 0x01 #define I2C_9555_P1_BIT 0x02 #define I2C_9555_P2_BIT 0x04 #define I2C_9555_P3_BIT 0x08 #define I2C_9555_P4_BIT 0x10 #define I2C_9555_P5_BIT 0x20 #define I2C_9555_P6_BIT 0x40 #define I2C_9555_P7_BIT 0x80 #define I2C_9555_D_IN 1 #define I2C_9555_D_OUT 0 #define I2C_9555_1_PORT0_CONF_M 0xFF #define I2C_9555_1_PORT1_CONF_M 0xFF #define I2C_9555_2_PORT0_CONF_M 0xFF #define I2C_9555_2_PORT1_CONF_M 0xFF #define I2C_9555_3_PORT0_CONF_M 0xFF #define I2C_9555_3_PORT1_CONF_M 0xFF #define I2C_9555_4_PORT0_CONF_M 0x00 #define I2C_9555_4_PORT1_CONF_M 0x00 #define I2C_9555_5_PORT0_CONF_M 0x00 #define I2C_9555_5_PORT1_CONF_M 0x00 #define I2C_9555_6_PORT0_CONF_M 0xFF #define I2C_9555_6_PORT1_CONF_M 0xF3 #define I2C_9555_7_PORT0_CONF_M 0x00 #define I2C_9555_7_PORT1_CONF_M 0x00 #define I2C_9555_8_PORT0_CONF_M 0xD7 #define I2C_9555_8_PORT1_CONF_M 0x0F typedef struct { UINT8 I2C_9545_channel; //9545 channel UINT8 I2C_9555_address; //9555 chip address UINT8 I2C_9555_port; //9555 register port UINT8 I2C_9555_pin; //9555 GPIO pin UINT8 I2C_9555_direction; //9555 GPIO pin direction } I2C_GPIO_M_PIN; #define MID_INA209_1_ADDRESS 0x80 #define MID_INA209_2_ADDRESS 0x82 #define MID_INA209_3_ADDRESS 0x84 #define MID_INA209_4_ADDRESS 0x86 #define MID_INA209_5_ADDRESS 0x88 #define MID_INA209_6_ADDRESS 0x8A #define MID_INA209_7_ADDRESS 0x8C #define MID_INA209_8_ADDRESS 0x8E #define MID_INA209_CURRENT_P 0x06 #define MID_INA209_CALIBRA_P 0x16 #define PSU_MCU_ADDRESS 0xB0 #define PSU_EEPROM_ADDRESS 0xA0 #define PSU_FAN_OFFSET 0x06 #define BBU_LTC4100_ADDRESS (0x12 >> 1) #define BBU_LTC4100_CHARGER_SPECINFO_OFFSET 0x11 #define BBU_LTC4100_CHARGER_MODE_OFFSET 0x12 #define BBU_LTC4100_CHARGER_STATUS_OFFSET 0x13 #define BBU_LTC4100_CHARGE_CURRENT_OFFSET 0x14 #define BBU_LTC4100_CHARGE_VOLTAGE_OFFSET 0x15 #define BBU_LTC4100_ALARM_WARNING_OFFSET 0x16 #define BBU_LTC4100_LTC_OFFSET 0x3C #define BBU_LTC4100_RESET_TO_ZERO_BIT 0x0008 #define BBU_LTC4100_INHIBIT_CHARGE_BIT 0x0001 #define BBU_LTC4100_CHARGE_INHIBITED_BIT 0x0001 #define BBU_LTC4100_FULLY_CHARGED_BIT 0x0020 #define BBU_LTC4100_FULLY_DISCHARGED_BIT 0x0010 #define BBU_LTC4100_ALERT_ADDRESS (0x18 >> 1) #define BBU_LTC4100_ALERT_OFFSET 0x00 #define LSI_MIDPLANE_VER_0 0 #define TEST_MIDPLANE_VER_1 1 #define TEST_MIDPLANE_WO_BBU_CABLE 99 #define QUANTA_TEST_MIDPLANE_ID 0x0F #define SBB2_MIDPLANE_ID_1 0x02 //SBB 2.0 CAMDEN midplane ID (24 drives) #define SBB2_MIDPLANE_ID_2 0x04 //SBB midplane ID (12 drives) /*******************************/ /** I2C GPIO Access Address **/ /*******************************/ /*** BBU & PS Diag ***/ EXTERN I2C_GPIO_M_PIN PWR_INPL_0_L; EXTERN I2C_GPIO_M_PIN PWR_INPL_1_L; EXTERN I2C_GPIO_M_PIN PS0_FAULT_L; EXTERN I2C_GPIO_M_PIN PS1_FAULT_L; EXTERN I2C_GPIO_M_PIN PS0_CONTROL_L_BP1; EXTERN I2C_GPIO_M_PIN VCC_BBU_ENABLE; EXTERN I2C_GPIO_M_PIN VCC_PS_ENABLE; EXTERN I2C_GPIO_M_PIN VCC_BBU_SWITCH_ENABLE; EXTERN I2C_GPIO_M_PIN VCC_PS_ALT_ENABLE; EXTERN I2C_GPIO_M_PIN AC_GOOD; /*** Emulate BBU module ***/ EXTERN I2C_GPIO_M_PIN BBU_INPLACE_L; EXTERN I2C_GPIO_M_PIN BBU_ENABLE; EXTERN I2C_GPIO_M_PIN BBU_DISCHARGE; EXTERN I2C_GPIO_M_PIN VCC12_INPUT; /*** LED Diag ***/ EXTERN I2C_GPIO_M_PIN RDY_RMV_LED_IN; EXTERN I2C_GPIO_M_PIN ALT_RTR_LED_L; EXTERN I2C_GPIO_M_PIN PS0_RTR_LED_L; EXTERN I2C_GPIO_M_PIN PS1_RTR_LED_L; EXTERN I2C_GPIO_M_PIN BOX_ID_LED_L; //Box Identify LED, SYS_DEF_HP_1_N EXTERN I2C_GPIO_M_PIN SUMMARY_FLT_LED_L; //Summary Fault LED, SYS_DEF_HP_2_N EXTERN I2C_GPIO_M_PIN BOX_OVER_TEMP_LED_L; //Box Over-Temp LED, SYS_DEF_HP_3_N EXTERN I2C_GPIO_M_PIN SYS_DEF_HP_4_N; //reserved pin /*** Cross Controller ***/ EXTERN I2C_GPIO_M_PIN INPL_L; EXTERN I2C_GPIO_M_PIN ALT_INPL_L; EXTERN I2C_GPIO_M_PIN FW_RUNNING_L; EXTERN I2C_GPIO_M_PIN ALT_FW_RUNNING_L; EXTERN I2C_GPIO_M_PIN ALT_RESET_L; EXTERN I2C_GPIO_M_PIN ALT_RESET_IN_L; EXTERN I2C_GPIO_M_PIN ALT_NMI_L; EXTERN I2C_GPIO_M_PIN ALT_NMI_IN_L; EXTERN I2C_GPIO_M_PIN RAID_ESM_L; EXTERN I2C_GPIO_M_PIN ALT_RAID_ESM_L; /*** Midplane Connection Diag ***/ EXTERN I2C_GPIO_M_PIN CONT_POSN_L; EXTERN I2C_GPIO_M_PIN CARD_IO_TEST; EXTERN I2C_GPIO_M_PIN MP_I2C1_RST_L; EXTERN I2C_GPIO_M_PIN MP_I2C2_RST_L; EXTERN I2C_GPIO_M_PIN AUD_ALARM_OUT; //audio alarm, SYS_DEF_LP_1 EXTERN I2C_GPIO_M_PIN SS_ID_0; //sybsystem ID 1, SYS_DEF_LP_2 EXTERN I2C_GPIO_M_PIN SS_ID_1; //subsystem ID 2, SYS_DEF_LP_3 EXTERN I2C_GPIO_M_PIN SS_ID_2; //subsystem ID 3, SYS_DEF_LP_4 EXTERN I2C_GPIO_M_PIN SS_ID_3; //subsystem ID 4, SYS_DEF_LP_5 EXTERN I2C_GPIO_M_PIN ALARM_MUTE_L; //alarm cancel, SYS_DEF_LP_6 EXTERN I2C_GPIO_M_PIN HARNESS_INPL_L; //harness inplace, SYS_DEF_LP_7 /*** Drive Diag ***/ EXTERN I2C_GPIO_M_PIN D_INPL_L[24]; EXTERN I2C_GPIO_M_PIN D_FAULT_LED_L[24]; EXTERN I2C_GPIO_M_PIN D_REPL_LED_L[24]; /*************************/ /** I2C GPIO Function **/ /*************************/ INT32 midplaneGpioWrite(I2C_GPIO_M_PIN *address, BOOLEAN status); INT32 midplaneGpioRead(I2C_GPIO_M_PIN *address); UINT16 ina209CurrentMonitor(UINT8 address); VOID ina209Write(UINT8 address, UINT8 regPointer, UINT8 data1, UINT8 data2); UINT16 ina209Read(UINT8 address, UINT8 regPointer); VOID testMidplaneTypeVerify(VOID); INT32 midplaneTypeVerification(VOID); VOID mid9545ChSet(UINT8 channel); VOID mid9555Write(UINT8 address, UINT8 command, UINT8 data0, UINT8 data1); VOID mid9555Read(UINT8 address, UINT8 command); #endif //__FPGA_I2C_GPIO_H__