/***  NVSRAM lock range  ***/
#define FPGA_NVSRAM_LOCK_NONE	0x00
#define FPGA_NVSRAM_LOCK_ENTIRE	0x80	//128 blocks
#define FPGA_NVSRAM_LOCK_MAX	0xff

//NVSRAM address
#define NVSRAM_ADDRESS_BASE     0x00000000
#define NVSRAM_ADDRESS_MAX      0x0007FFFF	//512kB
#define NVSRAM_TOTAL_SIZE		0x00080000	//512kB
#define NVSRAM_BLOCK_SIZE       0x1000      //4kB

//Test Pattern
#define NVSRAM_LOCK_PATTERN_0   0xF0
#define NVSRAM_LOCK_PATTERN_1   0x0F