/*******************************************************************************

NAME			$RCSfile: commPciChip.h,v $
SUMMARY			Header file for PCI configuration register diagnostics
VERSION			$Revision: 1.5 $
UPDATE DATE		$Date: 2009/09/15 09:12:43 $
PROGRAMMER		$Author: cloud $

		Copyright 2009 NetApp Corporation. All Rights Reserved.

DESCRIPTION:

REFERENCE:

*******************************************************************************/
#ifndef __INCcommPciChip
#define __INCcommPciChip

#include <linux/pci.h>


/*** TYPE DEFINITIONS ***/
typedef enum {

	PCIE_PLX_PEX8648 = 1,		/* PLX PEX8648 PCI-E Switch */
	NIC_INTEL_82576,			/* Intel 82576 Nic */
	NIC_INTEL_82579,			/* Patsburg 82579 Nic */
	LSI_SAS_3008_IOC0,			/* LSI SAS 3008 0 */
	LSI_SAS_3008_IOC1,			/* LSI SAS 3008 1 */
	LSI_SAS_3008_IOC2,			/* LSI SAS 3008 2 */
	LSI_SAS_3008_IOC3,			/* LSI SAS 3008 2 */
	LSI_SAS_3008_IOC4,			/* LSI SAS 3008 2 */
	NETAPP_ROCKET_FPGA,			/* NETAPP Zebulon FPGA */
	LSI_SAS_3008_IOC,
	LSI_SAS_2008_IOC,
	LSI_SAS_2308_IOC0,
	LSI_SAS_2308_IOC3,
	LSI_SAS_2308_IOC4,

} PCI_COMPONENT;


typedef struct 
{
	uint16_t    offset;				/* Register offset 2-byte wide*/
	uint8_t     number_of_reserves;	/* number of reserved bytes */
	uint8_t	    control;			/* Register type */
	uint8_t	    reset_value;		/* Initial value */
	uint8_t	    drmask;				/* Default value read mask */
	uint8_t	    rmask;				/* Test read mask */
	uint8_t	    wmask;				/* Test write mask */
	uint8_t	    pattern;
} REG_STRUCT;


/* CONTROL bits */
#define REG_IG		0x01	/* Ignore initial value */
#define	REG_RO		0x02	/* Read only */
#define REG_RW		0x04	/* Read and write */
#define REG_RWC		0x08	/* Read and write clear */
#define REG_CT		0x10	/* Read Fixed value */ 
#define REG_WD		0x10	/* Write Disable */ 
#define REG_AD		0x20	/* Used for address line test */
#define REG_RS		0x80	/* Register is reserved */


/*************************************
 *  Generic PCI Test Functions
 *************************************/
extern int pciRegTest(PCI_COMPONENT, int (*performTest) (REG_STRUCT*, struct pci_dev*, int));
extern int pciReadTest(REG_STRUCT*, struct pci_dev*, int);
extern int pciAddressLineTest(REG_STRUCT*, struct pci_dev* pdev, int);
extern int pciDataLineTest(REG_STRUCT*, struct pci_dev*, int);

/************************************************************/
/* APIs to access PCI configuration space
 ************************************************************/
extern int pciConfigReadByte(uint16_t bus, uint8_t dev, uint8_t func,
		uint16_t offset, uint8_t *value);
extern int pciConfigReadWord(uint16_t bus, uint8_t dev, uint8_t func,
		uint16_t offset, uint16_t *value);
extern int pciConfigReadDWord(uint16_t bus, uint8_t dev, uint8_t func,
		uint16_t offset, uint32_t *value);
extern int pciConfigWriteByte(uint16_t bus, uint8_t dev, uint8_t func,
		uint16_t offset, uint8_t value);
extern int pciConfigWriteWord(uint16_t bus, uint8_t dev, uint8_t func,
		uint16_t offset, uint16_t value);
extern int pciConfigWriteDWord(uint16_t bus, uint8_t dev, uint8_t func,
		uint16_t offset, uint32_t value);
extern int pciConfigShowByte(uint16_t bus, uint8_t dev, uint8_t func, uint16_t offset);
extern int pciConfigShowWord(uint16_t bus, uint8_t dev, uint8_t func, uint16_t offset);
extern int pciConfigShowDWord(uint16_t bus, uint8_t dev, uint8_t func, uint16_t offset);

#endif /* __INCcommPciChip */