/*******************************************************************************

NAME            pchLpcDiag.h
SUMMARY         header file for Ibex Peak LPC interface function diagnostics
VERSION         %version: 1 %
UPDATE DATE     %date_modified: Jun 5 15:00 2009 %
PROGRAMMER      %created_by:    Jim Tu %

        Copyright 2009 Quanta Corporation. All Rights Reserved.

DESCRIPTION:
        This file has code to test Ibex Peak LPC interface

NOTES:

REFERENCE:

*******************************************************************************/


#ifndef __PATSBURG_LPC_DIAG_H__
#define __PATSBURG_LPC_DIAG_H__

#define INTEL_VENDOR_ID					0x8086

/*** TYPE DEFINITIONS ***/
typedef enum
{
	PATSBURG_NIC_82579,				/* NIC 82579 */
	PATSBURG_SATA,					/* SATA Controller */
	PATSBURG_USB_EHCI,				/* USB EHCI Controller */
	PATSBURG_PCIE_PORT,				/* PCI-Express Port */
	PATSBURG_THERMAL,				/* Thermal Subsystem */
	PATSBURG_VECI,					/* Virtualization Engine Controller Interface */
	PATSBURG_HECI					/* USB EHCI Controller */

} PATSBURG_PCI_COMPONENT;

#define INTEL_PATSBURG_PCI_BRIDGE_DEVICE_ID_OLD		0x1D25
#define INTEL_PATSBURG_PCI_BRIDGE_DEVICE_ID		0x1d10
#define INTEL_IBX_PCI_BRIDGE_DEVICE_ID			0x3721

#define INTEL_PATSBURG_NIC_82579_DEVICE_ID		0x1502
#define INTEL_IBX_NIC_82577_DEVICE_ID           	0x10EA  // 0x3B41

#define INTEL_PATSBURG_LPC_DEVICE_ID			0x1D41
#define INTEL_PATSBURG_LPC_DEVICE_ID_OLD		0x1D40
#define INTEL_IBX_LPC_DEVICE_ID				0x3B14

#define INTEL_PATSBURG_SATA_AHCI_DEVICE_ID		0x1D02
#define INTEL_IBX_SATA_AHCI_DEVICE_ID			0x3B22

#define INTEL_PATSBURG_THERMAL_DEVICE_ID		0x1D24
// #define INTEL_IBX_THERMAL_DEVICE_ID

#define INTEL_PATSBURG_EHCI_1_DEVICE_ID			0x1D26
#define INTEL_PATSBURG_EHCI_2_DEVICE_ID			0x1D2D

#define INTEL_IBX_EHCI_1_DEVICE_ID			0x3B3C
#define INTEL_IBX_EHCI_2_DEVICE_ID			0x3B34

#define INTEL_PATSBURG_PCIE_PORT_1_DEVICE_ID		0x1D10
#define INTEL_PATSBURG_PCIE_PORT_2_DEVICE_ID		0x1D12
#define INTEL_PATSBURG_PCIE_PORT_3_DEVICE_ID		0x1D14
#define INTEL_PATSBURG_PCIE_PORT_4_DEVICE_ID		0x1D16
#define INTEL_PATSBURG_PCIE_PORT_5_DEVICE_ID		0x1D18
#define INTEL_PATSBURG_PCIE_PORT_6_DEVICE_ID		0x1D1A
#define INTEL_PATSBURG_PCIE_PORT_7_DEVICE_ID		0x1D1C
#define INTEL_PATSBURG_PCIE_PORT_8_DEVICE_ID		0x1D1E

#define INTEL_IBX_PCIE_PORT_1_DEVICE_ID			0x3b42

#define INTEL_PATSBURG_HECI_1_DEVICE_ID			0x1D3A
#define INTEL_PATSBURG_HECI_2_DEVICE_ID			0x1D3B

#define INTEL_IBX_UHCI_1_DEVICE_ID			0x3B36
#define INTEL_IBX_UHCI_2_DEVICE_ID			0x3B37
#define INTEL_IBX_UHCI_3_DEVICE_ID			0x3B38
#define INTEL_IBX_UHCI_4_DEVICE_ID			0x3B39
#define INTEL_IBX_UHCI_5_DEVICE_ID			0x3B3B
#define INTEL_IBX_UHCI_6_DEVICE_ID			0x3B3E
#define INTEL_IBX_UHCI_7_DEVICE_ID			0x3B3A
#define INTEL_IBX_UHCI_8_DEVICE_ID			0x3B40
#define INTEL_IBX_UHCI_9_DEVICE_ID			0x3B3F

/* PCIE Register */
#define PCH_RCBA_OFFSET                            	0xF0
#define PATSBURG_RCBA_LENGTH				0x3A8C
#define IBX_RCBA_LENGTH					0x35B4

#define PATSBURG_DMI_LSTS_OFFSET			0x21AA
#define IBX_DMI_LSTS_OFFSET				0x01A9

#define PCH_PCIE_LSTS_OFFSET				0x52


#define PATSBURG_DMI_X4_LINK_WIDTH			0x42

#define PATSBURG_PCIE_X4_LINK_WIDTH			0x41
#define PCH_PCIE_X4_LINK_WIDTH				0x41

#define PATSBURG_PCIE_X2_LINK_WIDTH			0x21
#define PCH_PCIE_X2_LINK_WIDTH				0x21

#define PCH_PCIE_X1_LINK_WIDTH				0x11

/* power management */
#define PATSBURG_NIC_82579_PMCS_OFFSET			0xCC
#define PCH_NIC_E1000_PMCS_OFFSET			0xCC // 82577: PIKESPEAK; 82579: SOYUZ

#define PCH_SATA_PMCS_OFFSET				0x74

#define PCH_EHCI_PMCS_OFFSET				0x54

#define PATSBURG_THERMAL_PMCS_OFFSET			0x54
#define PCH_THERMAL_PMCS_OFFSET				0x54

#define PCH_PCIE_PORT_PMCS_OFFSET			0xA4

#define PATSBURG_VECI_PMCS_OFFSET			0x54
#define PCH_VECI_PMCS_OFFSET				0x54

#define PATSBURG_HECI_PMCS_OFFSET			0x54
#define PCH_HECI_PMCS_OFFSET				0x54

#define	PATSBURG_PMCS_POWER_STATE_BITS			0x03
#define	PCH_PMCS_POWER_STATE_BITS			0x03

#define PCH_PMCS_D0_STATE				0xFC
#define PCH_PMCS_D3_STATE				0x03

/* RTC */
#define PATSBURG_RTC_1_INDEX_IOPORT				0x70
#define PATSBURG_RTC_1_TARGET_IOPORT			0x71
#define PATSBURG_RTC_2_INDEX_IOPORT				0x72
#define PATSBURG_RTC_2_TARGET_IOPORT			0x73

#define PATSBURG_RTC_SECONDS_INDEX				0x00
#define PATSBURG_RTC_SECONDS_ALARM_INDEX		0x01
#define PATSBURG_RTC_MINUTES_INDEX				0x02
#define PATSBURG_RTC_MINUTES_ALARM_INDEX		0x03
#define PATSBURG_RTC_HOURS_INDEX				0x04
#define PATSBURG_RTC_HOURS_ALARM_INDEX			0x05
#define PATSBURG_RTC_DAY_OF_WEEK_INDEX			0x06
#define PATSBURG_RTC_DAY_OF_MONTH_INDEX			0x07
#define PATSBURG_RTC_MONTH_INDEX				0x08
#define PATSBURG_RTC_YEAR_INDEX					0x09
#define PATSBURG_RTC_REG_A_INDEX				0x0A
#define PATSBURG_RTC_REG_B_INDEX				0x0B
#define PATSBURG_RTC_REG_C_INDEX				0x0C
#define PATSBURG_RTC_REG_D_INDEX				0x0D

#define PATSBURG_RTC_REG_A_UIP_BIT				0x80
#define PATSBURG_RTC_REG_B_SET_BIT				0x80
#define PATSBURG_RTC_REG_B_DM_BIT				0x04
#define PATSBURG_RTC_REG_B_HF_BIT				0x02

#define PCH_RTC_1_INDEX_IOPORT					0x70
#define PCH_RTC_1_TARGET_IOPORT					0x71
#define PCH_RTC_2_INDEX_IOPORT					0x72
#define PCH_RTC_2_TARGET_IOPORT					0x73

#define PCH_RTC_SECONDS_INDEX					0x00
#define PCH_RTC_SECONDS_ALARM_INDEX				0x01
#define PCH_RTC_MINUTES_INDEX					0x02
#define PCH_RTC_MINUTES_ALARM_INDEX				0x03
#define PCH_RTC_HOURS_INDEX					0x04
#define PCH_RTC_HOURS_ALARM_INDEX				0x05
#define PCH_RTC_DAY_OF_WEEK_INDEX				0x06
#define PCH_RTC_DAY_OF_MONTH_INDEX				0x07
#define PCH_RTC_MONTH_INDEX					0x08
#define PCH_RTC_YEAR_INDEX					0x09
#define PCH_RTC_REG_A_INDEX					0x0A
#define PCH_RTC_REG_B_INDEX					0x0B
#define PCH_RTC_REG_C_INDEX					0x0C
#define PCH_RTC_REG_D_INDEX					0x0D

#define PCH_RTC_REG_A_UIP_BIT					0x80
#define PCH_RTC_REG_B_SET_BIT					0x80
#define PCH_RTC_REG_B_DM_BIT					0x04
#define PCH_RTC_REG_B_HF_BIT					0x02

#define SYSCLKRATE                      		100

#define RTC_INIT_SIGNATURE              		('R' << 24 | 'T' << 16 | 'C' << 8 | 'I')

#define RTC_DM_BIT								0x04

#define RTC_BCD_MODE							0
#define RTC_BINARY_MODE							1

//#ifndef __RTC_TIME__
//#define __RTC_TIME__
//struct rtc_time {
//	INT32 tm_sec;
//	INT32 tm_min;
//	INT32 tm_hour;
//	INT32 tm_mday;
//	INT32 tm_mon;
//	INT32 tm_year;
//	INT32 tm_wday;
//	INT32 tm_yday;
//	INT32 tm_isdst;
//};
//#endif //__RTC_TIME__

//#ifndef _TIMESPEC_DECLARED
//#define _TIMESPEC_DECLARED
//struct timespec {
//	time_t	tv_sec;		/* seconds */
//	long	tv_nsec;	/* and nanoseconds */
//};
//#endif

/* 8259 Interrupt/GPIO */
#define PATSBURG_8259_MASTER_FIRST_PORT			0x20
#define PATSBURG_8259_MASTER_SECOND_PORT		0x21
#define PATSBURG_8259_SLAVE_FIRST_PORT			0xA0
#define PATSBURG_8259_SLAVE_SECOND_PORT			0xA1
#define PATSBURG_8259_MASTER_PIC_TRIGGERED_PORT	0x4D0
#define PATSBURG_8259_SLAVE_PIC_TRIGGERED_PORT	0x4D1

#define PCH_8259_MASTER_FIRST_PORT			0x20
#define PCH_8259_MASTER_SECOND_PORT		0x21
#define PCH_8259_SLAVE_FIRST_PORT			0xA0
#define PCH_8259_SLAVE_SECOND_PORT			0xA1
#define PCH_8259_MASTER_PIC_TRIGGERED_PORT	0x4D0
#define PCH_8259_SLAVE_PIC_TRIGGERED_PORT	0x4D1

//Master port is for ICW1, OCW2, OCW3
//Slave port is for ICW2, ICW3, ICW4, OCW1

#define PATSBURG_8259_ICW1			0x01
#define PATSBURG_8259_ICW2			0x
#define PATSBURG_8259_ICW3_MASTER	0x04
#define PATSBURG_8259_ICW3_SLAVE		0x02
#define PATSBURG_8259_ICW4			0x01
#define PATSBURG_8259_OCW1			0x
#define PATSBURG_8259_OCW2			0x
#define PATSBURG_8259_OCW3			0x

#define PCH_8259_ICW1			0x01
#define PCH_8259_ICW2			0x
#define PCH_8259_ICW3_MASTER	0x04
#define PCH_8259_ICW3_SLAVE		0x02
#define PCH_8259_ICW4			0x01
#define PCH_8259_OCW1			0x
#define PCH_8259_OCW2			0x
#define PCH_8259_OCW3			0x

#define PATSBURG_GPIO_BAR_OFFSET		0x48
#define PATSBURG_GPIO_LVL_OFFSET		0x0C

#define PCH_GPIO_BAR_OFFSET		0x48
#define PCH_GPIO_LVL_OFFSET		0x0C

#define PCH_GPIO_BOARD_ID_SKU0	0x04
#define PCH_GPIO_BOARD_ID_SKU1	0x08
#define PCH_GPIO_BOARD_ID_SKU2	0x10
#define PCH_GPIO_BOARD_ID_SKU3	0x20
#define PCH_GPIO_BOARD_ID_SKU_BITS (PCH_GPIO_BOARD_ID_SKU0 | PCH_GPIO_BOARD_ID_SKU1 | PCH_GPIO_BOARD_ID_SKU2 | PCH_GPIO_BOARD_ID_SKU3)

#define SOYUZ_GPIO_BOARDID		0x3C
#define PIKESPEAK_GPIO_BOARDID		0x08

#endif	//__PATSBURG_LPC_DIAG_H__