/******************************************************************************* NAME fpgaIntMaskDiag.h SUMMARY header file for Zebulon FPGA INT32errupt/mask function diagnostics VERSION %version: 1 % UPDATE DATE %date_modified: May 3 14:15 2009 % PROGRAMMER %created_by: Jim Tu % Copyright 2009 Quanta Corporation. All Rights Reserved. DESCRIPTION: This file has code to test INT32errupt/mask function of Zebulon FPGA NOTES: REFERENCE: *******************************************************************************/ #ifndef __FPGA_INT_MASK_CTRL_H__ #define __FPGA_INT_MASK_CTRL_H__ #define IntPND3_CRM_OFFSET 3 #define IntPND3_CRN_OFFSET 3 #define HPI_PENDING_BIT 0x80000000 #define XInt7_PENDING_BIT 0x80000000 /*** Export Function ***/ //main diagnostics INT32 fpgaInterruptMaskDiag(VOID); //cross Controller VOID fpgaClearAlternateInplaceInt(VOID); INT32 fpgaAlternateInplaceInt(VOID); VOID fpgaSetAlternateNmiOut(BOOLEAN status); VOID fpgaClearAlternateNmiIn(VOID); INT32 fpgaAlternateNmiIn(VOID); //INT32errupt INT32 fpgaSubsystemInt(VOID); VOID fpgaClearSubsystemInt(VOID); INT32 fpgaControllerOverTempInt(VOID); //controller over temp. INT32 fpgaThermostateInt(VOID); //CPU over temp. INT32 fpgaDirectedReset(VOID); INT32 fpgaHarnessInplaceInt(VOID); //mask 1 VOID fpgaPsAcGoodIntMask(BOOLEAN status); //mask 2 VOID fpgaPs0FaultMask(BOOLEAN status); VOID fpgaPs1FaultMask(BOOLEAN status); VOID fpgaTempIntMask(BOOLEAN status); VOID fpgaAlarmCancelMask(BOOLEAN status); VOID fpgaPs0OverTempMask(BOOLEAN status); VOID fpgaPs1OverTempMask(BOOLEAN status); //mask 3 VOID fpgaPs0InplaceMask(BOOLEAN status); VOID fpgaPs1InplaceMask(BOOLEAN status); VOID fpgaBatteryInplaceMask(BOOLEAN status); VOID fpgaAlternateInplaceIntMask(BOOLEAN status); VOID fpgaBatteryDrawingIntMask(BOOLEAN status); VOID fpgaBatteryEnableMask(BOOLEAN status); //mask B VOID fpgaSubsystemIntMask(BOOLEAN status); //other functions VOID fpgaMaskIntAll(BOOLEAN status); VOID fpgaDirectedResetMaskSet(BOOLEAN status); //VOID fpgaNmiOutEnable(BOOLEAN status); VOID fpgaTestModeEnable(BOOLEAN status); #endif //__FPGA_INT_MASK_CTRL_H__