#ifndef DIAG_MPT_H_INCLUDED #define DIAG_MPT_H_INCLUDED #include #include #include #include #include #include #include #include #include "../../mpi/mpi2_type.h" /* MPI basic type definitions */ #include "../../mpi/mpi2.h" /* MPI Message independent structures and definitions */ #include "../../mpi/mpi2_ioc.h" /* MPI IOC, Port, Event, FW Download, and FW Upload messages */ #include "../../mpi/mpi2_cnfg.h" /* MPI Configuration messages and pages */ #include "../../mpi/mpi2_init.h" /* MPI SCSI initiator mode messages and structures */ #include "../../mpi/mpi2_raid.h" /* MPI Integrated RAID messages and structures */ #include "../../mpi/mpi2_targ.h" /* MPI Target mode messages and structures */ #include "../../mpi/mpi2_tool.h" /* MPI diagnostic tool structures and definitions */ #include "../../mpi/mpi2_sas.h" /* MPI Serial Attached SCSI structures and definitions */ #include "../../mpt3sas_compatibility.h" #include "../../mpt3sas_debug.h" #define SCSI_COMMAND_TEST_UNIT_READY (0x00) #define SCSI_COMMAND_REQUEST_SENSE (0x03) #define SCSI_COMMAND_FORMAT_UNIT (0x04) #define SCSI_COMMAND_READ_6 (0x08) #define SCSI_COMMAND_WRITE_6 (0x0A) #define SCSI_COMMAND_INQUIRY (0x12) #define SCSI_COMMAND_MODE_SELECT (0x15) #define SCSI_COMMAND_MODE_SENSE (0x1A) #define SCSI_COMMAND_START_STOP_UNIT (0x1B) #define SCSI_COMMAND_RECEIVE_DIAGNOSTIC (0x1C) #define SCSI_COMMAND_SEND_DIAGNOSTIC (0x1D) #define SCSI_COMMAND_READ_CAPACITY (0x25) #define SCSI_COMMAND_READ_10 (0x28) #define SCSI_COMMAND_WRITE_10 (0x2A) #define SCSI_COMMAND_WRITE_VERIFY_10 (0x2E) #define SCSI_COMMAND_VERIFY_10 (0x2F) #define SCSI_COMMAND_READ_BUFFER (0x3C) #define SCSI_COMMAND_WRITE_BUFFER (0x3B) #define SCSI_COMMAND_READ_LONG (0x3E) #define SCSI_COMMAND_WRITE_LONG (0x3F) #define SCSI_COMMAND_WRITE_SAME (0x41) #define SCSI_COMMAND_LOG_SELECT (0x4C) #define SCSI_COMMAND_LOG_SENSE (0x4D) #define SCSI_COMMAND_MODE_SELECT_10 (0x55) #define SCSI_COMMAND_MODE_SENSE_10 (0x5A) #define SCSI_COMMAND_PERS_RESERVE_OUT (0x5F) #define SCSI_COMMAND_READ_16 (0x88) #define SCSI_COMMAND_WRITE_16 (0x8A) #define SCSI_COMMAND_WRITE_VERIFY_16 (0x8E) #define SCSI_COMMAND_VERIFY_16 (0x8F) #define SCSI_COMMAND_WRITE_SAME_16 (0x93) #define SCSI_COMMAND_READ_CAPACITY_16 (0x9E) #define SCSI_COMMAND_WRITE_LONG_16 (0x9F) #define SCSI_COMMAND_REPORT_LUNS (0xA0) #define SCSI_COMMAND_SECURITY_PROTOCOL_IN (0xA2) #define SCSI_COMMAND_READ_12 (0xA8) #define SCSI_COMMAND_WRITE_12 (0xAA) #define SCSI_COMMAND_READ_MEDIA_SERIAL_NUMBER (0xAB) #define SCSI_COMMAND_WRITE_VERIFY_12 (0xAE) #define SCSI_COMMAND_VERIFY_12 (0xAF) #define SCSI_COMMAND_SECURITY_PROTOCOL_OUT (0xB5) #define SSP_INQUIRY_CMD 0x12 typedef struct _INQUIRY_CMD { U8 OPERATION_CODE; U8 EVPD: 1; U8 OBSOLETE: 1; U8 RESERVED: 6; U8 PAGE_CODE; U16 ALLOCATION_LENGTH; }INQUIRY_CMD, *PTR_INQUIRY_CMD; typedef struct _INQUIRY_DATA { U8 PERIPHERAL_DEVICE_TYPE: 4; U8 PERIPHERAL_QUALIFIER: 4; U8 RESERVED_B1: 7; U8 RMB: 1; U8 VERSION; U8 RESPONSE_DATA_FORMAT: 4; U8 HISUP: 1; U8 NORMACA: 1; U8 OBSOLETE_B3_BIT6: 1; U8 OBSOLETE_B3_BIT7: 1; U8 ADDITIONAL_LENGTH; U8 PROTECT: 1; U8 RESERVED_B5: 2; U8 PC: 1; U8 TPGS: 2; U8 ACC: 1; U8 SCCS: 1; U8 ADDR16: 1; U8 OBSOLETE_B6_BIT1: 1; U8 OBSOLETE_B6_BIT2: 1; U8 OBSOLETE_B6_BIT3: 1; U8 MULTIP: 1; U8 VS: 1; U8 ENCSERV: 1; U8 OBSOLETE_B6_BIT7: 1; U8 VS_B6: 1; U8 CMDQUE: 1; U8 OBSOLETE_B7_BIT2: 1; U8 OBSOLETE_B7_BIT3: 1; U8 SYNC: 1; U8 WBUS: 1; U8 OBSOLETE_B7_BIT6: 1; U8 OBSOLETE_B7_BIT7: 1; U8 VENDER_ID[8]; U8 PRODUCT_ID[16]; U8 PRODUCT_REV[4]; U8 VENDER_SPECIFIC[20]; U8 RESERVED_B56_TO_B95[40]; }INQUIRY_DATA, *PTR_INQUIRY_DATA; /* * SAS 2308 IOC PHY Register Definitions * (these registers are used in IOC phy test) */ #define SAS_IOC_ADDR_INC_PER_QUAD 0x400 #define SAS_IOC_ADDR_INC_PER_LANE 0x80 #define SAS_IOC_BASE_ADDR_REG 0xD8100000 #define SAS_IOC_BASE_DATA_REG 0xD8100004 #define SAS_IOC_MANUAL_CTRL_REG_OFFSET 0x11C #define SAS_IOC_MANUAL_CTRL_ENABLE_BIT 0x01000000 // bit 24 #define SAS_IOC_MANUAL_SD_PROTOCOL_BIT 0x00003000 // bit 12-13 #define SAS_IOC_MANUAL_RX_RATE_BIT 0x00000C00 // bit 10-11 #define SAS_IOC_MANUAL_TX_RATE_BIT 0x00000300 // bit 8-9 #define SAS_IOC_MANUAL_SD_OP_MODE_BIT 0x0000003F // bit 0-5 #define SAS_IOC_MANUAL_RATE_6G 0x00000A00 #define SAS_IOC_MANUAL_RATE_3G 0x00000500 #define SAS_IOC_SD_OPMODE_N_PROT_6G 0x00003A24 #define SAS_IOC_SD_OPMODE_N_PROT_3G 0x00003524 #define SAS_IOC_SD_OPMODE_N_PROT_1_5G 0x00003024 #define SAS_IOC_SD_OPMODE_N_PROT_6G_PAT_A 0x00003A20 #define SAS_IOC_SD_OPMODE_N_PROT_3G_PAT_A 0x00003520 #define SAS_IOC_SD_OPMODE_N_PROT_1_5G_PAT_A 0x00003020 #define SAS_IOC_SD_OPMODE_N_PROT_RATE_MASK 0x00003FFF // bit 0-13 #define SAS_IOC_MANUAL_CTRL_STATUS0_OFFSET 0x100 #define SAS_IOC_JIT_CONF_MODE_BIT 0x00000080 // bit 7 #define SAS_IOC_JIT_FAST_MODE_BIT 0x00000040 // bit 6 #define SAS_IOC_RX_JIT_ENABLE_BIT 0x00000020 // bit 5 #define SAS_IOC_TX_JIT_ENABLE_BIT 0x00000010 // bit 4 #define SAS_IOC_MANUAL_CTRL_STATUS1_OFFSET 0x104 #define SAS_IOC_RX_JIT_IN_PROG_BIT 0x00000080 // bit 7 #define SAS_IOC_JIT_ERR_COUNT_REG_OFFSET 0x110 #define SAS_IOC_JIT_CTRL_STATUS0_REG_OFFSET 0x170 #define SAS_IOC_RX_JIT_PATTERN_SELECT_BIT 0xF0000000 // bit 28-31 #define SAS_IOC_TX_JIT_PATTERN_SELECT_BIT 0x0F000000 // bit 24-27 /* * Patterns - Pattern Length in Bits - Pattern Value * (From SEN 11139 v1.0 - May 2009) * ------------------------------------------------- * ALIGN - 280 - 0x0 * JT - 2240 - 0x1 * LTDP - 760 - 0x2 * HRQR - 2560 - 0x3 * LFSC - 1400 - 0x4 * SSOP - 20600 - 0x5 * COMP - 48560 - 0x6 * CUSTOM - 80 - 0x7 * JT+ - 2240 - 0x8 * CJTPAT - 4840 - 0x9 * PRBS7 - 127 - 0xA */ #define NEGOTIATED_LOGICAL_LINK_RATE_SHIFT 4 // below two bitwise masks are added by Sean P. to calculate the logical or physical link rate // in diag_ioc::sasdiag_getIocPhyStatus #define NEGOTIATED_LOGICAL_LINK_RATE_MASK 0xF0 #define NEGOTIATED_PHYSICAL_LINK_RATE_MASK 0x0F #define MPT_IOC_MAX_MEM_TEST_PATTERNS 4 /* SMP flags */ #define MPT_IOC_SMP_REQ_FRAME (0x40) #define MPT_IOC_SMP_REPLY_FRAME (0x41) #define MPT_IOC_SMP_REPORT_GENERAL (0x00) #define MPT_IOC_SMP_REPORT_MANUFACTURER_INFO (0x01) #define MPT_IOC_SMP_EXPECTED_EXPANDER_PHYS (0x26) /* expect 36 PHYs on an expander */ #define MPT_IOC_LINK_RATE_DISABLED (0x11) #define MPT_IOC_LOOPBACK_TEST_LEN 1024 /* SCSI flags and constants */ #define MPT_IOC_SCSI_TEST_UNIT_READY 0x00 #define MPT_IOC_SCSI_WRITE_BUFFER 0x3B #define MPT_IOC_SCSI_READ_BUFFER 0x3C #define MPT_IOC_IS_EXPANDER(x) ( \ ((x & MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) == MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER) || \ ((x & MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) == MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER) ) #define MPT_IOC_IS_TARGET(x) (x & MPI2_SAS_DEVICE_INFO_SSP_TARGET) /* * SMP def */ #define SMP_FRAME_TYPE_RQST 0x40 #define SMP_FRAME_TYPE_RSP 0x41 #define SMP_FUNC_REPORT_MANUFAC_INFO 0x01 #define SMP_FUNC_DISCOVER 0x10 #define SMP_FUNC_REPORT_PHY_ERROR_LOG 0x11 #define SMP_FUNC_PHY_CONTROL 0x91 #define SMP_PHY_CTRL_OP_LINK_RESET 0x01 #define SMP_PHY_CTRL_OP_HARD_RESET 0X02 #define SMP_PHY_CTRL_OP_DISABLE 0x03 #define SMP_PHY_CTRL_OP_CLEAR_ERROR_LOG 0x05 #define SMP_PHY_CTRL_OP_SET_ATTACHED_DEV_NAME 0x09 #define SMP_LINK_RATE_DO_NOT_CHANGE_CURRENT_VALUE 0x00 #define SMP_LINK_RATE_1_5G 0x08 #define SMP_LINK_RATE_3_0G 0x09 #define SMP_LINK_RATE_6_0G 0x0A /* * This def is moved from base driver code "mpt3sas_xxx.c" * to this .h file here for Diag code to share */ #ifdef CTRL_HWDIAG struct config_request{ u16 sz; void *page; dma_addr_t page_dma; }; enum device_responsive_state { DEVICE_READY, DEVICE_RETRY, DEVICE_RETRY_UA, DEVICE_START_UNIT, DEVICE_STOP_UNIT, DEVICE_ERROR, }; struct _scsi_io_transfer { u16 handle; u8 is_raid; enum dma_data_direction dir; u32 data_length; dma_addr_t data_dma; u8 sense[SCSI_SENSE_BUFFERSIZE]; u32 lun; u8 cdb_length; u8 cdb[32]; u8 timeout; u8 VF_ID; u8 VP_ID; u8 valid_reply; /* the following bits are only valid when 'valid_reply = 1' */ u32 sense_length; u16 ioc_status; u8 scsi_state; u8 scsi_status; u32 log_info; u32 transfer_length; }; #endif // CTRL_HWDIAG #ifdef SASDIAG_FWDL_BOOT typedef unsigned char IT8; typedef unsigned short IT16; typedef unsigned long IT32; #ifdef _MSC_VER typedef __int64 IT64; #else typedef long long IT64; #endif #endif // fwdl /* Structure for IOC phy configuration */ typedef struct _DG_IOC_PHY_CFG { Mpi2SasIOUnitPage0_t *page0; /* pointer to current configuration */ unsigned long portInfo; /* port #'s for each phy */ unsigned long enableInfo; /* enabled phys */ unsigned long initInfo; /* initiator phys */ unsigned long tgtInfo; /* target phys */ bool loopbackMode; /* true if enabling loopback mode */ } mpt_dgioc_phycfg; typedef struct _MPT_IOC_REPORT_GENERAL_REQUEST{ u8 smp_frame_type; u8 function; u8 reserved; u8 request_length; } mpt_dgIocReportGeneralRequest_t; typedef struct _MPT_IOC_REPORT_GENERAL_REPLY { u8 FrameType; /* 00h */ u8 Function; /* 01h */ u8 FunctionResult; /* 02h */ u8 Reserved1; /* 03h */ u16 ExpanderChangeCount; /* 04h */ u16 ExpanderRouteIndexes; /* 06h */ u8 Reserved2; /* 08h */ u8 NumberOfPhys; /* 09h */ u8 CfgFlags; /* 0Ah */ u8 Reserved3[17]; /* 0Bh */ u32 CRC; /* 1Ch */ } mpt_dgIocReportGeneralReply_t; typedef struct _SMP_REPORT_MANUFACT_INFO_RQST { U8 SMP_FRAM_TYPE; U8 FUNCTION; U8 ALLOCATED_RESPONSE_LENGTH; U8 REQUEST_LENGTH; }SMP_REPORT_MANUFACT_INFO_RQST, *PTR_SMP_REPORT_MANUFACT_INFO_RQST; typedef struct _SMP_REPORT_MANUFACT_INFO_RSP { U8 SMP_FRAM_TYPE; U8 FUNCTION; U8 FUNCTION_RESULT; U8 RESPONSE_LENGTH; U16 EXPANDER_CHANGE_COUNT; U16 RESERVED_B6_TO_B7; U8 SAS_1_1_FORMAT: 1; U8 RESERVED_B8: 7; U8 RESERVED_B9; U16 RESERVED_B10_TO_B11; U8 VENDOR_ID[8]; U8 PRODUCT_ID[16]; U8 PRODUCT_REV[4]; U8 COMPONENT_VENDOR_ID[8]; U16 COMPONENT_ID; U8 COMPONENT_REV; U8 RESERVED_B51; U8 VENDOR_SPECIFIC[8]; }SMP_REPORT_MANUFACT_INFO_RSP, *PTR_SMP_REPORT_MANUFACT_INFO_RSP; typedef struct _SMP_REPORT_PHY_ERROR_LOG_RQST { U8 SMP_FRAM_TYPE; U8 FUNCTION; U8 ALLOCATED_RESPONSE_LENGTH; U8 REQUEST_LENGTH; U32 RESERVED_B4_TO_B7; U8 RESERVED_B8; U8 PHY_IDENTIFIER; U16 RESERVED_B10_TO_B11; }SMP_REPORT_PHY_ERROR_LOG_RQST, *PTR_SMP_REPORT_PHY_ERROR_LOG_RQST; typedef struct _SMP_REPORT_PHY_ERROR_LOG_RSP { U8 SMP_FRAME_TYPE; U8 FUNCTION; U8 FUNCTION_RESULT; U8 RESPONSE_LENGTH; U16 EXPANDER_CHANGE_COUNT; U16 RESERVED_B6_TO_B7; U8 RESERVED_B8; U8 PHY_IDENTIFIER; U16 RESERVED_B10_TO_B11; U32 INVALID_DWORD_COUNT; U32 RUNNING_DISPARITY_ERROR_COUNT; U32 LOSS_OF_DWORD_SYNC_COUNT; U32 PHY_RESET_PROBLEM_COUNT; }SMP_REPORT_PHY_ERROR_LOG_RSP, *PTR_SMP_REPORT_PHY_ERROR_LOG_RSP; typedef struct _SMP_DISCOVER_RQST { U8 SMP_FRAME_TYPE; U8 FUNCTION; U8 ALLOCATED_RESPONSE_LENGTH; U8 REQUEST_LENGTH; U32 RESERVED_B4_TO_B7; U8 IGNORE_ZONE_GROUP; U8 PHY_IDENTIFIER; U16 RESERVED_B10_TO_B11; }SMP_DISCOVER_RQST, *PTR_SMP_DISCOVER_RQST; typedef struct _SMP_DISCOVER_RSP { U8 SMP_FRAME_TYPE; U8 FUNCTION; U8 FUNCTION_RESULT; U8 RESPONSE_LENGTH; U16 EXPANDER_CHANGE_COUNT; U16 RESERVED_B6_TO_B7; U8 RESERVED_B8; U8 PHY_IDENTIFIER; U16 RESERVED_B10_TO_B11; U8 ATTACHED_REASON: 4; U8 ATTACHED_DEVICE_TYPE: 3; U8 RESERVED_B12: 1; U8 NEGOTIATED_LOGICAL_LINK_RATE: 4; U8 RESERVED_B13: 4; U8 ATTACHED_SATA_HOST: 1; U8 ATTACHED_SMP_INITIATOR: 1; U8 ATTACHED_STP_INITIATOR: 1; U8 ATTACHED_SSP_INITIATOR: 1; U8 RESERVED_B14: 4; U8 ATTACHED_SATA_DEVICE: 1; U8 ATTACHED_SMP_TARGET: 1; U8 ATTACHED_STP_TARGET: 1; U8 ATTACHED_SSP_TARGET: 1; U8 RESERVED_B15: 4; U8 ATTACHED_SATA_PORT_SELECTOR: 1; U64 SAS_ADDRESS; U64 ATTACHED_SAS_ADDRESS; U8 ATTACHED_PHY_IDENTIFIER; U8 ATTACHED_BREAK_REPLY_CAPABLE: 1; U8 ATTACHED_RQST_INSIDE_ZPSDS: 1; U8 ATTACHED_INSIDE_ZPSDS_PERSISTENT: 1; U8 RESERVED_B33: 5; U16 RESERVED_B34_TO_B35; U32 RESERVED_B36_TO_B39; U8 HARDWARE_MIN_PHYSICAL_LINK_RATE: 4; U8 PROG_MIN_PHYSICAL_LINK_RATE: 4; U8 HARDWARE_MAX_PHYSICAL_LINK_RATE: 4; U8 PROG_MAX_PHYSICAL_LINK_RATE: 4; U8 PHY_CHANGE_COUNT; U8 PARTIAL_PATHWAY_TIMEOUT_VALUE: 4; U8 RESERVED_B43: 3; U8 VIRTUAL_PHY: 7; U8 ROUTING_ATTRIBUTE: 4; U8 RESERVED_B44: 4; U8 CONNECTOR_TYPE: 7; U8 RESERVED_B55: 1; U8 CONNECTOR_ELEMENT_INDEX; U8 CONNECTOR_PHYSICAL_LINK; U16 RESERVED_B48_TO_B49; U16 VENDOR_SPECIFIC; }SMP_DISCOVER_RSP, *PTR_SMP_DISCOVER_RSP; typedef struct _SMP_PHY_CONTROL_RQST { U8 SMP_FRAME_TYPE; U8 FUNCTION; U8 ALLOCATED_RESPONSE_LENGTH; U8 REQUEST_LENGTH; U16 EXPANDER_CHANGE_COUNT; U16 RESERVED_B6_TO_B7; U8 RESERVED_B8; U8 PHY_IDENTIFIER; U8 PHY_OPERATION; U8 UPD_PART_PATHWAY_TIMEOUT_VALUE; U32 RESERVED_B12_TO_B15; U32 RESERVED_B16_TO_B19; U32 RESERVED_B20_TO_B23; U64 ATTACHED_DEVICE_NAME; U8 RESERVED_B32: 4; U8 PROG_MIN_PHYSICAL_LINK_RATE: 4; U8 RESERVED_B33: 4; U8 PROG_MAX_PHYSICAL_LINK_RATE: 4; U16 RESERVED_B34_TO_B35; U8 PART_PATHWAY_TIMEOUT_VALUE: 4; U8 RESERVED_B36: 4; U8 RESERVED_B37; U16 RESERVED_B38_TO_39; }SMP_PHY_CONTROL_RQST, *PTR_SMP_PHY_CONTROL_RQST; typedef struct _SMP_PHY_CONTROL_RSP { U8 SMP_FRAME_TYPE; U8 FUNCTION; U8 FUNCTION_RESULT; U8 RESPONSE_LENGTH; }SMP_PHY_CONTROL_RSP, *PTR_SMP_PHY_CONTROL_RSP; typedef struct _SAS_EXP_PHY_STATUS { U8 Device; U8 Rate; U16 reserved; int DrvSlot; U64 AttachedSasAddr; U32 InvDw; U32 DispErr; U32 LOSCnt; U32 RstProbCnt; }SAS_EXP_PHY_STATUS; int base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes, u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag); int config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, u16 sz); int config_get_manufacturing_pg5(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage5_t *config_page, u16 sz, U8 action); int config_set_manufacturing_pg5(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage5_t *config_page, u16 sz); int mpt3sas_config_get_iounit_pg9(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage9_t *config_page, u16 sz); int mpt3sas_config_get_iounit_pg7(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage7_t *config_page); int mpt3sas_config_set_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page, u16 sz); int mpt3sas_config_get_ioc_pg7(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOCPage7_t *config_page); int mpt3sas_config_get_manufacturing_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage1_t *config_page); #endif // include