/* * ************************************** * Copyright (C) LSI LOGIC, Inc. 2011 * ************************************** */ #ifndef SASDIAG_INCLUDED #define SASDIAG_INCLUDED #include "diag_platform.h" /* * Supported SAS chips */ #define IOC_PCI_DEV_2308_BAD_SBR 0x0086 #define IOC_PCI_DEV_2308 0x0087 #define IOC_PCI_DEV_2008 0x0072 #define IOC_PCI_DEV_3008 0x0097 #define IOC_PCI_DEV_3616 0x00D1 /* * Supported SAS Port Config definitions */ #define CFG_ID_DEFAULT 0x00 #define CFG_ID_EXTERNAL_HOST_HBA 0x01 #define CFG_ID_EXTERNAL_EXPAN_TRAY 0x02 #define CFG_ID_INTERNAL_DRIVE_TRAY 0x03 #define CFG_ID_IOC_LOOPBACK 0x04 #define CFG_ID_IOC_PORT_LOOPBACK 0x05 #define CFG_ID_IOC_CROSS_PORT_LOOP 0x06 #define CFG_ID_SAS_BOARD_STRESS_UUT 0x07 #define CFG_ID_SAS_BOARD_STRESS_FIXTURE 0x08 #define CFG_ID_SAS_BFT_CROSS_LOOP 0x09 #define CFG_ID_IOC_HIC_CROSS_LOOP 0x10 #define CFG_ID_IOC_HIC_LOOPBACK 0x11 #define CFG_ID_IOC_HIC_CROSS_LOOP_NEW 0x12 #define CFG_ID_IOC_CROSS_LOOP_RECOVER 0x13 #define CFG_ID_CTRL_UUT 0x20 #define CFG_ID_CTRL_UUT_NARROW 0x21 #define CFG_ID_CTRL_FIXTURE 0x22 #define CFG_ID_CTRL_FIXTURE_NARROW 0x23 #define CFG_ID_EXPANSION_CABLE_CHECK 0x30 #define CFG_ID_HIC_STRESS_UUT_FIXTURE 0x40 #define CFG_ID_HIC_STRESS_STAND_ALONE 0x50 #define CFG_ID_CTRL_BACK_END_STRESS 0x60 #define PARAM_INVALID 0x70 #define CFG_ID_IOC_SPECIFIC 0xFF /* * Misc. IOC/PORT/PHY type definition */ #define BASE_IOC_TYPE 0x00 #define HIC_IOC_TYPE 0x01 #define IOC_NUM_ALL 0xCA #define IOC_NUM_INVALID 0xFF #define IOC_NUM_NA IOC_NUM_INVALID #define PHY_NUM_ALL 0xAA #define PHY_NUM_INVALID 0xFF #define PHY_NUM_NA PHY_NUM_INVALID #define PHY_TYPE_UNKNOWN 0x00 #define PHY_TYPE_IOC 0x01 #define PHY_TYPE_EXP 0x02 #define PORT_NUM_ALL PHY_NUM_ALL #define PORT_NUM_INVALID PHY_NUM_INVALID #define PORT_TYPE_UNKNOWN PHY_TYPE_UNKNOWN #define PORT_TYPE_IOC PHY_TYPE_IOC #define PORT_TYPE_EXP PHY_TYPE_EXP /* * IOC/Exp Port/Phy Status Definition */ #define PHY_STAT_UNKNOWN 0x00 #define PHY_STAT_LINKDOWN 0x01 #define PHY_STAT_LINKUP 0x02 #define PHY_STAT_ENABLED 0x10 #define PHY_STAT_DISABLED 0x20 #define PORT_STAT_UNKNOWN PHY_STAT_UNKNOWN #define PORT_STAT_ENABLED PHY_STAT_ENABLED #define PORT_STAT_DISABLED PHY_STAT_DISABLED #define PORT_STAT_LINKDOWN PHY_STAT_LINKDOWN #define PORT_STAT_LINKUP PHY_STAT_LINKUP /* * Port/Phy Ctrl Action definition */ #define PHY_CTRL_RESET 0x01 #define PHY_CTRL_DISABLE 0x02 #define PHY_CTRL_ENABLE 0x03 #define PHY_CTRL_CHANGE_INIT 0x04 #define PHY_CTRL_CHANGE_TGT 0x05 #define PHY_CTRL_DISABLE_EXCLUSIVE 0x10 #define PHY_CTRL_ENABLE_EXCLUSIVE 0x20 #define PHY_CTRL_CHANGE_INIT_EXCLUSIVE 0x30 #define PHY_CTRL_CHANGE_TGT_EXCLUSIVE 0x40 #define PHY_CTRL_GET_PHY_STATUS 0x50 #define PHY_CTRL_SET_ENABLE 0x60 #define PHY_CTRL_SET_DISABLE 0x70 #define PHY_CTRL_SET_LINK_SPEED 0x80 #define PORT_CTRL_RESET PHY_CTRL_RESET #define PORT_CTRL_DISABLE PHY_CTRL_DISABLE #define PORT_CTRL_ENABLE PHY_CTRL_ENABLE #define PORT_CTRL_CHANGE_INIT PHY_CTRL_CHANGE_INIT #define PORT_CTRL_CHANGE_TGT PHY_CTRL_CHANGE_TGT #define PORT_CTRL_DISABLE_EXCLUSIVE PHY_CTRL_DISABLE_EXCLUSIVE #define PORT_CTRL_ENABLE_EXCLUSIVE PHY_CTRL_ENABLE_EXCLUSIVE #define PORT_CTRL_CHANGE_INIT_EXCLUSIVE PHY_CTRL_CHANGE_INIT_EXCLUSIVE #define PORT_CTRL_CHANGE_TGT_EXCLUSIVE PHY_CTRL_CHANGE_TGT_EXCLUSIVE /* * IOC Port/Phy Function Defintion */ #define FUNC_NA 0x00 #define FUNC_INITIATOR 0x01 #define FUNC_TARGET 0x02 #define FUNC_PORT_LOOPBACK 0x04 // only used for loopback on port boundary #define FUNC_IOC_LOOPBACK 0x08 // only used for loopback on chip boundary /* * IOC Port Connect Description */ #define PORT_IOC_CON_INVALID 0xFF #define PORT_IOC_CON_NA 0x00 // port not applicable/used, place holder #define PORT_IOC_CON_DIRECT PORT_IOC_CON_NA // connect to drive - direct attach #define PORT_IOC_CON_REMOTE_EXP 0x01 // ioc port used to connect to remote expander #define PORT_IOC_CON_LOCAL_EXP 0x02 // ioc port used to connect to local expander #define PORT_IOC_CON_REMOTE_IOC 0x03 // used to connect to a remote IOC on peer controller #define PORT_IOC_CON_HOST_N_EXPAN 0x04 // used to connect to either external HBA or expansion tray #define PORT_IOC_CON_EXPAN 0x05 // used to connect to expansion tray #define PORT_IOC_CON_HOST 0x06 // used to connect to external HBA #define PORT_IOC_CON_LOOP 0x07 // used to connect to other port on a diff IOC #define PORT_IOC_CON_LOOPBACK 0x08 // used to connect to other ioc port on the same IOC #define PORT_IOC_CON_ALL 0x0F // all connections from all ports /* * Expander Port Connect Description. This might look redundant with ioc connection but * it is actually for use with expander opterions, from expder perspective */ #define PORT_EXP_CON_NA 0x00 // port not applicable/used, place holder #define PORT_EXP_CON_LOOPBACK 0x10 // exp port used in internal loopback #define PORT_EXP_CON_LOCAL_IOC 0x20 // exp port connect to local IOC #define PORT_EXP_CON_REMOTE_IOC 0x30 // exp port connect to remote IOC #define PORT_EXP_CON_ALL_IOC 0x40 // exp port connect to local IOC #define PORT_EXP_CON_EXPAN 0x50 // exp port connect to internal expansion tray (RBOB) #define PORT_EXP_CON_DRIVE 0x60 // exp port connect to direct attached drive #define PORT_EXP_CON_ALL 0xF0 // all connections from all exp ports /* * Path type definition */ #define PATH_TYPE_UNKNOWN 0x00 // not defined/applicable #define PATH_TYPE_TO_LOCAL_EXP_DRIVE 0x01 // also means to local exp #define PATH_TYPE_TO_REMOTE_EXP_DRIVE 0x02 // also means to remote exp #define PATH_TYPE_TO_HOST_N_EXPAN 0x03 /* * IOC Path ID definitions */ #define PATH_NA 0x0000 // not defined/applicable #define PATH_IOC_0_LOCAL_EXP 0x0001 // from local ioc num 0 to local exp #define PATH_IOC_2_LOCAL_EXP 0x0002 // from local ioc num 2 to local exp (Soyuz proto board) #define PATH_IOC_2_REMOTE_IOC_2 0x0004 // from local ioc num 2 to remote ioc 2 (Soyuz EVT board) #define PATH_IOC_LOCAL_EXP_ALL 0x0008 #define PATH_IOC_1_REMOTE_EXP 0x0010 // from local ioc num 1 to remote exp (Soyuz Proto board) #define PATH_IOC_2_REMOTE_EXP 0x0020 // from local ioc num 2 to remote exp #define PATH_IOC_REMOTE_EXP_ALL 0x0040 #define PATH_IOC_EXP_ALL 0x0080 #define PATH_BASE_HOST_N_EXPAN_0 0x0100 // path to either hba or expansion from ioc 0 #define PATH_BASE_HOST_N_EXPAN_1 0x0200 // path to either hba or expansion from ioc 1 #define PATH_BASE_HOST_N_EXPAN_ALL 0x0400 #if defined(TAHOE_X86_PLATFORM) #define PATH_BASE_PORT_0 0x0800 // path to hba from ioc 0, port 0 #define PATH_BASE_PORT_1 0x0C00 // path to hba from ioc 0, port 1 #endif #define PATH_HIC_HOST_ALL 0x0800 // all paths from all HIC IOCs #define PATH_HIC_PORT_0 0x1000 // from hic ioc 0, port 0 #define PATH_HIC_PORT_1 0x2000 // from hic ioc 0, port 1 #define PATH_HIC_PORT_2 0x4000 // from hic ioc 1, port 0 #define PATH_HIC_PORT_3 0x8000 // from hic ioc 1, port 1 /* * Expander Path ID definitions. This might look redundant with ioc path but * it is actually for use with expander opterions, from expder perspective */ #define PATH_EXP_LOCAL_0 0x1000 // from local ioc num 0 to drive #define PATH_EXP_LOCAL_1 0x2000 // from local ioc num 1 to drive #define PATH_EXP_LOCAL_ALL 0x3000 #define PATH_EXP_REMOTE_1 0x4000 // not use now #define PATH_EXP_REMOTE_2 0x5000 // from remote ioc num 1 #define PATH_EXP_REMOTE_ALL 0x6000 // not use now #define PATH_EXP_EXPAN 0x7000 // exp to external expansion tray #define PATH_EXP_DRIVE 0x8000 // exp to drive in entire encl #define PATH_EXP_EACH_PHY 0x9000 // path to individual exp phy #define PATH_EXP_TRAY_0 0xA000 // exp to drive tray 0 (in multi-tray encl) #define PATH_EXP_TRAY_1 0xB000 // exp to drive tray 1 #define PATH_EXP_TRAY_2 0xC000 // exp to drive tray 2 #define PATH_EXP_TRAY_3 0xD000 // exp to drive tray 3 #define PATH_EXP_TRAY_4 0xE000 // exp to drive tray 4 #define PATH_EXP_PATH_ALL 0xF000 #define MAX_EXP_PHY_PER_Q_PORT 4 // phys per quad port #define MAX_IOC_PHY_PER_WIDE_PORT 4 typedef struct { U8 port_num; // port number, numbering based on lowest phy num U8 port_func; // port function as "initiator" or "target" U8 port_stat; // port status "enabled" or "disabled" U8 con_desc; // port connection description (connect to what) U16 path_id; // port on the HIC, 0 = no, 1 = yes U8 num_phys; // number of phys in the port U8 reserve; // number of phys in the port U8 phy_list[MAX_IOC_PHYS]; // phy list made up the port } ioc_port; typedef struct { U8 port_num; // narrow/wide port number, based on low-hi phy num U8 quad_num; // exp quad port number U8 port_stat; // port status "enabled" or "disabled" U8 con_desc; // port connection description (connect to what) U16 path_id; // port connection description (connect to what) U8 to_tray; // tray number the port is connected to U16 reserve; U8 phy_list[MAX_EXP_PHY_PER_Q_PORT]; // info for phys made up the port } exp_port; /* This is the contiguous list of IOC ports on entire contrl */ typedef struct { U8 ioc_num; // the IOC number U8 reserve; U8 num_base_ioc_ports; // number of ports on the base IOC U8 num_hic_ioc_ports; // number of ports on the HIC ioc_port w_ports[MAX_WIDE_PORT_PER_IOC]; } ioc_port_cfg; typedef struct { // list of exp wide ports U8 num_quad_wide_ports; U8 num_quad_ports_to_drive; U16 reserve; exp_port w_ports[MAX_EXP_WIDE_PORT + MAX_EXP_QUAD_PORT_TO_DRIVE]; } exp_port_cfg; typedef struct { U8 num_base_ioc; U8 num_hic_ioc; U16 reserve; ioc_port_cfg ioc_map[NUM_IOC_ON_BASE_CTRL + NUM_IOC_ON_HIC]; // all sas ports exp_port_cfg exp_map; // there's only 1 exp on base ctrl board } full_ctrl_port_cfg; /** * ---------------------------------------------------------------------------------------------------------------------- * Print IOCTL opcodes * ---------------------------------------------------------------------------------------------------------------------- */ #define PAGE_CODE_PAGE_NA 0x00 #define PAGE_CODE_MAN_PAGE2 0x02 #define PAGE_CODE_MAN_PAGE3 0x03 #define PAGE_CODE_MAN_PAGE5 0x05 #define PAGE_CODE_MAN_PAGE6 0x06 #define PAGE_CODE_MAN_PAGE8 0x08 #define PAGE_CODE_SASIO_UNIT_PAGE0 0x10 #define PAGE_CODE_SASIO_UNIT_PAGE1 0x11 #define PAGE_CODE_PHY_PAGE0 0x20 #define PAGE_CODE_EXP_PAGE0 0x30 #define PAGE_CODE_EXP_PAGE1 0x31 #define PAGE_CODE_DEVICE_PAGE0 0x40 #define PRINT_DBG_LEVEL 0x01 // sasdiag_printDebugLevel() #define PRINT_IOC_PHY_ERR 0x02 // sasdiag_printIocPhyErr() #define PRINT_MPI_CFG_PAGE 0x03 #define PRINT_ATTACH_DEVICES 0x04 #define PRINT_EXP_CFG_PAGE 0x05 #define PRINT_EXP_PHY_STATUS 0x06 // scsih_ShowExpPhyStatus() #define PRINT_IOC_DEV_LIST_PER_CON 0x07 // sasdiag_showDevList() #define PRINT_IOC_DRIVE_OWNED 0x08 // sasdiag_showDriveListOwn() #define PRINT_FPGA_REG 0x09 // fpgaRegisterShow() typedef struct { U8 ioc_num; U8 mpi_cfg_page_code; // print MPI page U16 devHandle; U8 phy; U8 option; U8 reserve[2]; } print_ioc_info; typedef struct { U8 cfg_page; // print expander Manuf config page U8 exp_port_con_desc; U16 reserve2; } print_exp_info; typedef struct { U8 ioc_num; U8 connect; bool refresh; U8 reserve; } print_dev_info; typedef struct { int debugFlag; U32 reserve; } print_debug; typedef struct { U32 fpgaOffset; U32 reserve; } print_fpga; typedef struct { U8 action; U8 reserve1; U16 reserve2; union { print_ioc_info i_print; print_exp_info e_print; print_dev_info dev_print; print_debug dbg_print; print_fpga f_print; }; } print_ctrl; /** * --------------------------------- * IOC Control IOCTL opcodes * --------------------------------- */ #define CTRL_IOC_LOAD_FW_N_RESET_HARD 0x01 #define CTRL_IOC_LOAD_FW_N_RESET_SOFT 0x02 #define CTRL_IOC_HARD_RESET 0x03 #define CTRL_IOC_HARD_SOFT 0x04 #define CTRL_IOC_INIT 0x05 // scsih_init_ioc() #define CTRL_IOC_FIXTURE_INIT 0x06 // scsih_dgFixtureIocInit() typedef struct { U8 action; U8 ioc_num; U16 reserve; } ioc_ctrl; /** * --------------------------------- * Config Control IOCTL opcodes * --------------------------------- */ #define CFG_RESTORE_DEFAULT_CFG 0x01 #define CFG_FW_CHANGE 0x02 #define CFG_GET_EXP_ATTACHED_PORT_PARMS 0x03 #define CFG_GET_HOST_PORT_PARMS 0x04 #define CFG_GET_SAS_DRIVER_VER 0x05 typedef struct { U8 connection; U8 port_num; U8 phy_start; // config action U8 phy_end; // one of the defined standard config support U16 path; U16 reserve1; } cfg_port_parm; typedef struct { U8 majorVer; U8 minorVer; U8 buildVer; U8 releaseVer; } cfg_sas_driver_version; typedef struct { U8 cfg_act; // config action U8 cfg_id; // one of the defined standard config support U8 ioc_num; U8 fwIdx; union { cfg_port_parm p_parm; cfg_sas_driver_version sas_driver_ver; }; } cfg_ctrl; /** * --------------------------------- * GPIO Control IOCTL opcodes * --------------------------------- */ #define GPIO_READ 0x01 #define GPIO_WRITE 0x02 #define GPIO_LED_ON 0x03 #define GPIO_LED_OFF 0x04 typedef struct { U8 gpio_num; U8 reserve; U16 gpio_val; } gpio_info; typedef struct { U8 ioc_num; U16 reserve; gpio_info gpio; } gpio_ctrl; typedef struct { U8 port_num; char* led_name; } led_ctrl; typedef struct { U8 action; union { gpio_ctrl g_ctrl; led_ctrl l_ctrl; }; } gpio_led_ctrl; /** * -------------------------------------------------------------------------------- * FPGA Register Control IOCTL opcodes * --------------------------------------------------------------------------------- */ #define FPGA_CTRL_REG_READ 0x01 #define FPGA_CTRL_REG_WRITE 0x02 #define FPGA_CTRL_PREG_WRITE 0x03 #define FPGA_CTRL_EXP_RST 0x04 typedef struct { U8 action; U8 regOffset; U8 val; } fpga_ctrl; /** * -------------------------------------------------------------------------------- * Register Control IOCTL opcodes * --------------------------------------------------------------------------------- */ #define REG_CTRL_READ 0x01 #define REG_CTRL_WRITE 0x02 typedef struct { U8 action; U8 ioc_num; U16 reserve; U32 regOffset; U32 val; } reg_ctrl; /** * -------------------------------------------------------------------------------- * Port/Phy Control IOCTL opcodes * --------------------------------------------------------------------------------- */ // old: scsih_dgConfigExpanderPort(U8 portType, U8 ctrlOption) - en/dis portype // old: scsih_dgDisableFalconPhyInit(void) // old: scsih_dgDisableLocalFalconPhy(void) - scsih_dgDisableExpanderPhy(phy) // old: _scsih_doDeviceIocBeTargetMode(ioc) typedef struct { U8 port_type; // exp or ioc U8 port_con; // see definitions in diag_port_cfg.h U8 port_num; U8 phy_num; U32 reserve; } port_ctrl; typedef struct { U8 phy_num; U8 port_num; U8 port_flag; U8 phy_flag; U8 max_min_link_rate; U32 reserve; } phy_ctrl; // see diag_port_cfg.c for control action typedef struct { U8 action; U8 ioc_num; // ignore if exp port/phy U16 reserve; port_ctrl p_ctrl; phy_ctrl phyctrl; } port_phy_ctrl; /** * --------------------------------- * Execution control IOCTL opcodes * --------------------------------- */ // Exec options #define EXEC_OP_NONE 0x00 #define EXEC_OP_SERIAL 0x01 #define EXEC_OP_PARALLEL 0x02 #define EXEC_OP_IGNORE_ERR 0x03 #define EXEC_OP_SOE 0x04 // stop when hit error #define EXEC_OP_SOE_LIMIT 0x05 // stop when hit x error, x is the limit #define EXEC_OP_DELAY 0x06 // Exec Test #define EXEC_IOC_PHY_TEST 0x0001 #define EXEC_IOC_MEMORY_TEST 0x0002 #define EXEC_IOC_REG_READ_TEST 0x0003 #define EXEC_IOC_REG_ADDR_LINE_TEST 0x0004 #define EXEC_IOC_REG_DATA_LINE_TEST 0x0005 #define EXEC_IOC_LOOPBACK_WITH_EXP_TEST 0x0006 #define EXEC_IOC_PORT_LOOPBACK_TEST 0x0007 #define EXEC_IOC_CROSS_PORT_LOOP_TEST 0x0008 #define EXEC_IOC_EXP_SMP_TEST 0x0009 // sasdiag_testEachIocPhyToExp() #define EXEC_EXP_PHY_TEST 0x000A // sasdiag_testExpanderLoopback() #define EXEC_EXP_FLASH_TEST 0x000B // sasdiag_testExpFlash() #define EXEC_EXP_FLASH_ADDR_LINE_TEST 0x000C // sasdiag_testExpFlashAddrLine() #define EXEC_EXP_FLASH_DATA_LINE_TEST 0x000D // sasdiag_testExpFlashDataLine() #define EXEC_WRITE_READ_COMPARE_TEST 0x000E // sasdiag_writeReadCompare() // Exec Task #define EXEC_IOC_CLEAR_PHY_ERR_LOG 0x0010 // sasIocPhyErrLogClear(int ioc_num, int mapi) #define EXEC_IOC_CLEAR_SINGLE_PHY_ERR_LOG 0x0011 // sasIocSinglePhyErrLogClear(int ioc_num, int phy_num) #define EXEC_EXP_CLEAR_PHY_ERR_LOG 0x0020 // sasExpPhyErrLogClear(expander_position, mapi) #define EXEC_WRITE_IOC_ERR_COUNT 0x0030 // getIocErrorCnt() #define EXEC_WRITE_IOC_ERR_STAT 0x0040 // sasdiag_getIocPhyStatus() #define EXEC_WRITE_EXP_ERR_COUNT 0x0050 // sasdiag_getExpanderErrorCnt() #define EXEC_WRITE_EXP_PHY_STAT 0x0060 // getSasExpPhyStatus() #define EXEC_WRITE_D_ADDR_MAP 0x0070 //createSasAddrMap() #define EXEC_WRITE_D_PEER_ADDR_MAP 0x0080 // createPeerSasAddrMap() #define EXEC_WRITE_D_JBOD_ADDR_MAP 0x0090 // createJbodSasAddrMap() #define EXEC_INIT_SBR 0x0100 // sasdiag_initSbrFromManPage2() #define EXEC_INIT_PHY_MAP 0x0200 // sasInitMapping() #define EXEC_INIT_MPT_DRIVER 0x0300 // _scsih_init() #define EXEC_SET_DRIVE_OWNERSHIP 0x0400 // sasdiag_setDriveOwnership() // Exec task flag #define EXEC_TASK_APPLY_LOCAL 0x01 #define EXEC_TASK_APPLY_REMOTE 0x02 #define EXEC_TASK_APPLY_ALL_PHY 0x04 #define EXEC_TASK_REFRESH 0x08 #define EXEC_TASK_FROM_MAPI 0x10 // Exec Expander #define EXEC_VERIFY_EXP_PHY_TEST 0x0500 // sasdiag_checkExpPhyLoopbackProgress() #define EXEC_VERIFY_SECTOR_EXP_FLASH 0x0600 // sasdiag_verifyWalkingExpFlashSector() #define EXEC_ERASE_EXP_FLASH 0x0700 // sasdiag_eraseExpFlash() #define EXEC_PROGRAM_EXP_FLASH 0x0800 // sasdiag_programExpFlash() #define EXEC_BACKUP_EXP_FLASH 0x0900 // sasdiag_backupDataInExpFlash() #define EXEC_RESTORE_EXP_FLASH 0x0A00 // sasdiag_restoreDataToExpFlash() #define EXEC_FPGA_RESET_EXP 0x0B00 // sasdiag_fpgaExpReset() #define EXEC_FPGA_PROTECTED_REG_WRITE 0x0C00 // fpgaEncodedRegisterWrite() #define EXEC_FPGA_REG_WRITE 0x0D00 // fpgaRegisterWrite() #define EXEC_FPGA_ENABLE_EXP_PHY 0x0E00 // sasdiag_enableExpPhy() #define EXEC_FPGA_SET_EXP_UART 0x0F00 // sasdiag_setExpUart() // Exec Send IO cmd #define EXEC_SEND_IO_CMD 0x1000 // sasdiag_sendScsiCmd() #define EXEC_SEND_BLOCK_CMD 0x2000 // sasdiag_sendBlockCmd() // Exec IPC call #define EXEC_SAS_IPC_CALL 0x8000 // to do: IPC call ... app uses proc fs for now #define CALL_PEER_INIT 0x01 // peerSasIocInit() #define CALL_PEER_UUT_INIT 0x02 // peerUUTSasIocInit() #define CALL_PEER_PARSE_PHY 0x03 // ipcParsePhyMap() typedef struct { U8 ipc_call; // only used if option is exec IPC call U8 ipc_call_code; U16 reserve2; } exec_ipc; typedef struct { U8 ioc_num; U8 port_num; U8 devHandle; U8 dataPattern; U32 loopCount; U16 ioSize; // in 512-byte blocks U8 random; // 1= random, 0 = sequential U8 limit; // limit only if option is SOE U32 reserve; } exec_test; typedef struct { U8 ioc_num; U8 task_flag; union { U16 path_id; U8 con_desc; U8 phy_num; bool writeToFile; }; } exec_task; typedef struct { U8 ioc_num; U8 cmdCode; U16 devHandle; U32 loopCount; U16 ioSize; // in 512-byte (or 520-byte) blocks U8 dataPattern; U8 reserve1; U32 lba; U32 reserve2; } exec_io; typedef struct { U32 addr; // flash address U32 offset; // flash offset U32 len; // data len char *data; // data buffer U8 flag; U8 phyNum; U8 pattern; } exec_expander; typedef struct { U16 exec_action; U8 exec_opt; U8 delay; // delay value in sec U32 exec_status; union { exec_ipc ipc_exc; exec_test test_exc; exec_task task_exc; exec_expander exp_exc; exec_io ioCmd_exc; }; } exec_ctrl; /** * --------------------------------- * Status Check IOCTL opcodes * --------------------------------- */ #define CHECK_CFG_STAT 0x01 #define CHECK_PHY_STAT 0x02 #define CHECK_PORT_STAT 0x03 #define CHECK_EXPAN_PORT_LINK 0x04 // old: g_expansion_port_linked + chkCableLinked() #define CHECK_MPT_DRIVER_LOADED 0x05 // old: g_mpt_driver_loaded #define CHECK_FIXTURE_SAS_READY 0x06 // old: g_fixture_sas_ready #define CHECK_UUT_SAS_READY 0x07 typedef struct { U8 check_action; //check action union { U8 phy_type; // ioc or exp phy U8 port_type; // ioc or exp port U8 port_con; U16 path_id; }; U8 reserve; U32 status; /*union { U32 cfg_stat; U32 ioc_init_stat; U32 ioc_port_stat; U32 ioc_phy_stat; U32 exp_q_port_stat; U32 fixture_sas_ready_stat; U32 uut_sas_ready_stat; U32 mpt_driver_loaded_stat; }; */ } check_status; /** * --------------------------------- * Get Info IOCTL opcodes * --------------------------------- */ #define GET_NUM_IOC_PATHS 0x01 typedef struct { U8 path_type; U8 how_many; // number of paths with that path type U16 reserve; } num_path_info; #define GET_IOC_NUM_FROM_PATH 0x02 typedef struct { U8 ioc_num; // output - IOC num that controls the path U8 port_num; // ioc port num associated with that path id U16 path_id; } path_info; #define GET_IOC_INFO 0x03 typedef struct { U8 num_hic_iocs; U8 num_base_iocs; U8 num_ports_on_base_ioc; U8 num_ports_on_hic_ioc; U8 num_phys_on_ioc; U8 reserve1; U16 reserve2; } ioc_info; #define GET_EXP_INFO 0x04 typedef struct { U8 num_exp_phys; U8 expnum_quad_ports_to_drives; U8 num_ports_to_local_ioc; U8 num_ports_to_remote_ioc; } exp_info; #define GET_IOC_PORT 0x05 #define GET_EXP_Q_PORT 0x06 // one port typedef struct { U16 path_id; U16 reserve; union { exp_port e_port; // The SAS port associated with the path ioc_port i_port; }; } port_info; // old: scsih_Getlinkerrros - print ioc link err from sas phy page1 #define GET_IOC_PHY_ERR 0x07 typedef struct { U8 ioc_num; U8 phy_num; U16 reserve2; U32 InvalidDwordCount; U32 RunningDisparityErrorCount; U32 LossDwordSynchCount; U32 PhyResetProblemCount; } ioc_phy_err; #define GET_GPIO_VAL 0x08 #define GET_IOC_TEMP 0x09 typedef struct { U8 ioc_num; U16 temperature; U16 reserve; } ioc_temp_info; #define GET_IOC_TEMP_THRESHOLD 0x0A #define SET_IOC_TEMP_THRESHOLD 0x0B typedef struct { U16 flags; U16 reserve; U16 threshold[4]; }sensor_threshold; #define GET_TEMP_POLLINGINTERVAL 0x0C #define SET_TEMP_POLLINGINTERVAL 0x0D typedef struct { U8 action; U8 ioc_num; U8 sensor_num; U8 interval; U16 reserve; sensor_threshold sensor[1]; }ioc_threshold_ctrl; #define GET_FURY_TEMP 0x0E typedef struct { U8 ioc_num; U16 temperature; U16 reserve; U8 flags; }ioc_fury_temp; #define GET_IOC_PHY_SPEED 0x20 // for retriving PHY Speed typedef struct{ U8 ioc_num; U8 phy_num; U8 logical_link_speed; U8 physical_link_speed; }ioc_phy_speed; // Added by sean for restriving link speed #define GET_IOC_PHY_ATT_DEV_INFO 0x21 typedef struct{ U8 ioc_num; U8 phy_num; U32 att_dev_info; }ioc_phy_att_dev_info; // for getting attached device info #define GET_IOC_WWID 0x22 #define GET_IOC_DEFAULT_NVDATA_VERSION 0x23 #define GET_IOC_VPD 0x24 #define GET_IOC_BASIC_INFO 0x25 typedef struct { U16 get_action; // get what U8 ioc_num; U32 ioc_wwid[2]; U32 nvdata_defautl_version; union { ioc_temp_info temp_info; gpio_info g_info; ioc_info i_info; exp_info e_info; num_path_info num_paths; path_info path; port_info port; ioc_phy_err phy_err; ioc_fury_temp fury_temp; ioc_phy_speed phy_speed; ioc_phy_att_dev_info phy_att_dev_info; }; U8 vpd[256]; } get_info; #define GET_IOC_PHY_ERR_LIST 0x10 typedef struct { U8 ioc_num; // number of ioc to query U8 reserve1; U16 reserve2; ioc_phy_err phy_err[1]; // list of phy error, user has to alloc space for all ioc phys } ioc_phy_err_list_info; #define GET_PATH_LIST 0x11 // Get a list of all paths with that path_id typedef struct { U16 path_type; // input U16 reserve; path_info path_list[1]; // list of all path associated apth request } path_list_info; #define GET_IOC_PORT_LIST 0x12 #define GET_EXP_Q_PORT_LIST 0x13 // all ports typedef struct { U8 port_type; U8 num_ports; U8 ioc_num; U8 reserve; port_info port_list[1]; // list of all path associated apth request } port_list_info; // old: createSasAddrMap (port) // old: createPeerSasAddrMap (port) // old: createJbodSasAddrMap(void) #define GET_DRIVE_LIST 0x14 typedef struct { U64 addr; U8 tray; U8 slot; U16 devHandle; U32 reserve; } drive_info; typedef struct { U16 path_id; // local/remote path - default is local U8 connection; bool dualCtrlConfig; U16 numEntries; U16 reserve; drive_info *drive_list; // list of drives the IOC controls } drive_list_info; #define GET_GPIO_LIST 0x15 typedef struct { U8 ioc_num; U8 reserve0; U16 reserve1; gpio_info gpio_list[1]; // list of GPIOVal in IO UnitPage 3 } gpio_list_info; typedef struct { U16 get_action; // get what U8 ioc_num; U8 reserve; union { path_list_info path_l; port_list_info port_l; ioc_phy_err_list_info phy_err_l; drive_list_info drive_l; gpio_list_info gpio_l; }; } get_info_list; /* For host boot */ struct ioc_fw_img { char fullFwName[80]; U32 imgSize; } ; //extern struct ioc_fw_img iocFwFile[NUM_IOC_TOTAL]; #define EXEC_LOOPBACK_SETUP 0x01 #define EXEC_LOOPBACK_EXEC 0x02 #define EXEC_LOOPBACK_CLEANUP 0x03 #define EXEC_LOOPBACK_TRANSMIT_SETUP 0x04 #define EXEC_LOOPBACK_TRANSMIT_EXEC 0x05 #define EXEC_LOOPBACK_TRANSMIT_CLEANUP 0x06 #define SAS_LOOPBACK_NONE 0 #define SAS_LOOPBACK_EXTERNAL 1 #define SAS_LOOPBACK_INTERNAL 2 #define SAS_LOOPBACK_WITH_EXPANDER 3 #define SAS_LOOPBACK_REVERSE_EXTERNAL 4 typedef struct { U8 action; U8 reserve1; U16 reserve2; U32 sourceLogicalID; U32 destLogicalID; U32 loopbackPath; U32 numberOfBlocks; U32 blockSize; U32 testPattern; } sas_loopback_param; typedef struct { U8 ioc_num; U8 pageNum; U32 reserve; U32 eventMasks[4]; } get_ioc_eventmask; // Usage: // path list for all iocs --> ioc num + local/remote path id --> get drive list // --> ioc num + base host path id --> get ram disk // Get total path to expan/local/remote connection --> // --> get path list --> use path_id to get ioc num //old: _scsih_doDisplayAttachedDevices(ioc) //old: _scsih_dgIocShowSasIoUnitPage0 and Page1(ioc) #endif // include