/******************************************************************************************
** Project    : Tahoe for Linux
** Filename   : pciDrv.h
** Creator    : Katrina Liu
** Date       : May 10, 2012
** Description: Include header file for the PCI driver
**
** Copyright (c) 2012 Foxconn IND., Group. All Rights Reserved
**
** ---------------
** Version    : 1.0.0
** Date       : May 10, 2012
** Revised by : Katrina Liu
** Description: Preliminary release
**
**********************************************************************************************/

#ifndef _PCI_MODULE_H_
#define _PCI_MODULE_H_

#include <linux/ioctl.h>
#include <linux/pci.h>
#include <linux/types.h>

/* Define the device name and device number */
#define DEVICE_NAME            "pciDrv"
#define NODE_NAME              "/dev/pciDrv"

#define PCI_FIXUP_MAJOR    252
#define PCI_DYNAMIC_MAJOR  0  /* Dynamic major by default if set "0" */

#define PCI_MODULE_IOC_MAXNUM    13

/* Define our own private IOCTL */
#define PCI_MODULE_IOC_MAGIC                'P'
#define READ_PCI_CONFIG_BYTE       _IO(PCI_MODULE_IOC_MAGIC,   1)
#define READ_PCI_CONFIG_WORD       _IO(PCI_MODULE_IOC_MAGIC,   2)
#define READ_PCI_CONFIG_DWORD      _IO(PCI_MODULE_IOC_MAGIC,   3)
#define WRITE_PCI_CONFIG_BYTE      _IO(PCI_MODULE_IOC_MAGIC,   4)
#define WRITE_PCI_CONFIG_WORD      _IO(PCI_MODULE_IOC_MAGIC,   5)
#define WRITE_PCI_CONFIG_DWORD     _IO(PCI_MODULE_IOC_MAGIC,   6)
#define SEARCH_PCI_BY_VENDOR_ID    _IO(PCI_MODULE_IOC_MAGIC,   7)
#define CHECK_PCI_E_DEVICES        _IO(PCI_MODULE_IOC_MAGIC,   8)
#define PCIE_CAP_READ_BYTE         _IO(PCI_MODULE_IOC_MAGIC,   9)
#define PCIE_CAP_WRITE_BYTE        _IO(PCI_MODULE_IOC_MAGIC,   10)
#define PCIE_EXT_CAP_READ_BYTE     _IO(PCI_MODULE_IOC_MAGIC,   11)
#define PCIE_EXT_CAP_WRITE_BYTE    _IO(PCI_MODULE_IOC_MAGIC,   12)
#define PCIE_EXT_CAP_READ_DWORD    _IO(PCI_MODULE_IOC_MAGIC,   13)

typedef struct _config_pci_dev
{
    unsigned int    bus_num;
    unsigned int    dev_num;
    unsigned int    func_num;
	unsigned short  link_speed;
	unsigned short  link_width;

    unsigned short  device_id;
    unsigned short  vendor_id;
    unsigned char   pcie_cap;     // if pcie_cap is zero, it mean it's PCI but not PCIe
    unsigned char   msi_cap;
    unsigned char   msix_cap;
    unsigned char   dev_type;

    unsigned short  offset;     // For ioctl using, read/write offset of config space
    unsigned short  cap_id;     // For ioctl using, cap id
    unsigned int    data;       // For ioctl using, read/write data from/to config space

    unsigned int    class_type;
    unsigned int    reg_addr;   // For CAP and EXTCAP, save actual address we read/write

}__attribute__((packed)) config_pci_dev;

#define PLX_EEPROM_CMD_READ             3
#define PLX_EEPROM_CMD_READ_STATUS      5
#define PLX_EEPROM_CMD_WRITE_ENABLE     6
#define PLX_EEPROM_CMD_WRITE_DISABLE    4
#define PLX_EEPROM_CMD_WRITE            2
#define PLX_EEPROM_CMD_WRITE_STATUS     1

#define ERR_PCIDRV_NOTPCIE              1

#endif  /* _PCI_MODULE_H_ */