# SPDX-License-Identifier: GPL-2.0 config ARCH_ZYNQ bool "Xilinx Zynq ARM Cortex A9 Platform" depends on ARCH_MULTI_V7 select ARCH_HAS_RESET_CONTROLLER select ARCH_SUPPORTS_BIG_ENDIAN select ARM_AMBA select ARM_GIC select ARM_GLOBAL_TIMER if !CPU_FREQ select CADENCE_TTC_TIMER select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select ICST select MFD_SYSCON select PINCTRL select PINCTRL_ZYNQ select SOC_BUS help Support for Xilinx Zynq ARM Cortex A9 Platform if ARCH_ZYNQ menu "Xilinx Specific Options" config XILINX_PREFETCH bool "Cache Prefetch" default y help This option turns on L1 & L2 cache prefetching to get the best performance in many cases. This may not always be the best performance depending on the usage. endmenu endif